Qualification method for a 1MGy-tolerant front-end chip designed in 65nm CMOS for the read-out of remotely operated sensors and actuators during maintenance in ITER
Author:
Jens Verbeeck,Ying Cao,Marco Van Uffelen,Laura Mont Casellas,Carlo Damiani,Emilio Ruiz Morales,Roberto Ranz Santana,Richard Meek,Bernhard Haist,David Hamilton,Michiel Steyaert,Paul Leroux
Publication:
Fusion Engineering and Design
Copyright © 2015 Published by Elsevier B.V.